SE97BTP,547【PDF 9/53 页】IC TEMP SENSOR DIMM 8HWSON

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SE97B_1

Product data sheet

Rev. 01 27 January 2010

9 of 53

NXP Semiconductors

SE97B

DDR memory module temp sensor with integrated SPD

7.3.2 EVENT

thresholds

7.3.2.1 Alarm window

The device provides a comparison window with an UPPER trip point and a LOWER trip

point, programmed through the Upper Boundary Alarm Trip register (02h), and Lower

Boundary Alarm Trip register (03h). The Upper Boundary Alarm Trip register holds the

upper temperature trip point, while the Lower Boundary Alarm Trip register holds the lower

temperature trip point as modified by hysteresis as programmed in the Configuration

output triggers whenever entering or exiting (crossing

above or below) the alarm window.

" Advisory note:

NXP device: The EVENT

output can be cleared through the clear EVENT bit or

SMBus Alert Response Address (ARA).

Competitor device: The EVENT

output can be cleared only through the clear

EVENT bit.

Work-around: Only clear EVENT

output using the EVENT bit if both NXP and

competitor devices are used.

The Upper Boundary Alarm Trip should always be set above the Lower Boundary Alarm

Trip.

The alarm window limit is immediately compared with the temperature register even if it

has not been recently updated (e.g., device has been in standby) when the EVENT

turned on (CONFIG[3]).

Consider waiting one conversion cycle (125 ms) after setting the alarm window limit

before enabling the EVENT

output/comparing the alarm window limit with the temperature

If SMBUS[2] is set, then the alarm window limit will only be compared to the Temperature

is turned on.

7.3.2.2 Critical trip

The T

th(crit)

temperature setting is programmed in the Critical Alarm Trip register (04h) as

modified by hysteresis as programmed in the Configuration register. When the

temperature reaches the critical temperature value in this register (and EVENT

enabled), the EVENT

output asserts and cannot be de-asserted until the temperature

drops below the critical temperature threshold. The Event cannot be cleared through the

clear EVENT bit or SMBus Alert.

The Critical Alarm Trip should always be set above the Upper Boundary Alarm Trip.

The critical trip limit is immediately compared with the temperature register even if it has

not been recently updated (e.g., device has been in standby) when the EVENT

is turned

on (CONFIG[3]).

Consider waiting one conversion cycle (125 ms) after setting the critical trip limit before

enabling the EVENT

output/comparing the critical trip limit with the temperature register to

ensure that there is correct data in the temperature register.

If SMBUS[2] is set, then the alarm window limit will only be compared to the Temperature

is turned on.

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